1. Field of the Invention
The present invention relates to a hardware and software co-simulator and a its method, and more specifically to an apparatus for realizing a cooperative simulation which can verify both the functions of hardware and software at the same time, which is required when a logical system constructed by both hardware and software is designed.
2. Description of the Prior Art
Recently, with the advance of the performance of processors, functions so far satisfied by only hardware have been realized by use of software. In order to realize such functions as described above; that is, to construct the such system as described above effectively, it is necessary to design both hardware and software in parallel to each other by considering the tradeoff between both quantitatively.
Therefore, recently, a need of cooperative design of both hardware and software has been increased. In particular, the functional verification for the total system including the consistency between hardware and software is important to improve the design efficiency, so that it is indispensable to provide the hardware and software co-simulator which can simulate both functions of the hardware portion and the software portion simultaneously.
In the conventional hardware and software co-simulator, in general the simulator of a hardware description language (e.g., VHDL or Verilog-HDL) is used as a simulator for the hardware portion, on the other hand, a C program of instruction sets of the processor is used as a simulator for the software portion; and the simulation is executed by operating these two different simulators at the same time. In this case, both the simulators must be operated in synchronism with each other for cooperation with both. This is because the times at which events transferred between both the simulators occur cannot be known previously, before the actual simulations are executed. Therefore, when the actual simulations are executed, if both the simulators are operated without synchronism with each other, it is necessary to bring back the simulator situation to a past time point, so that an overhead inevitably increases.
Therefore, the following methods are so far known as the method of synchronizing the two simulators with each other:
1) A function for managing the entire time is additionally provided for the simulators, and the both simulators execute the simulations in accordance with the commands thereof.
2) One of the simulator is determined as a master and the other thereof is determined as a slave. The simulations are executed in such a way that the slave simulator follows the master simulator, by transferring the mutual simulation time data between both.
In the above-mentioned method 1), although the synchronism can be achieved most simply, since time proceeds in constant time unit as the entire co-simulator, there inevitably exist idle waiting times in both the simulators.
On the other hand, in the method 2), since the two simulators transfer the succeeding simulation time data between both, respectively, although there exists such an advantage that the simulation time can be advance at a time until the time at which at least one of the simulators is operated, there still exists a problem in that when one of the simulators is being operated, an idle waiting time inevitably occurs in the other of the simulators, until one of the simulators ends its operation.
In summary, in the conventional simulator apparatus, when the cooperative simulation is executed between a plurality of simulators, in general, each simulator is operated as an independent process and further the event data are transferred between the two simulators through communications between the processing steps. In this case, since each simulator must always control its own simulation by monitoring the simulation time of the other simulator, it is necessary to synchronize both the simulators with each other. In this case, since the overhead considerably increases, when the cooperative simulations are executed between two simulators having a large speed difference, the high-speed simulator must always wait the low-speed simulator, with the result that the total simulation speed is dependent upon the lowest simulation speed.
As described above, in the conventional simulator apparatus, when a logical system constructed by both hardware and software is required to be designed, in the hardware and software co-simulator used to verify both the functions of the hardware portion and the software portion simultaneously, since the two different simulators used for both the hardware and software portions are operated by synchronizing both the simulation times each other, an idle waiting time is inevitably produced in any one of the simulator according to the progressing situation of the simulators, thus causing a problem in that the simulation times are inevitably lengthened.